DocumentCode :
865146
Title :
Design of dividable interleaver for parallel decoding in turbo codes
Author :
Kwak, Jaeyoung ; Lee, Kwyro
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea
Volume :
38
Issue :
22
fYear :
2002
fDate :
10/24/2002 12:00:00 AM
Firstpage :
1362
Lastpage :
1364
Abstract :
A dividable interleaving method is proposed for turbo codes with parallel architecture to achieve high-throughput. This method not only solves the memory conflict problem in extrinsic information memory, but reduces the required memory for the interleaver. Many kinds of interleaver type are applicable to this method, the BER performance is similar to that achieved by other interleavers.
Keywords :
error statistics; interleaved codes; iterative decoding; parallel architectures; turbo codes; BER performance; dividable interleaver design; extrinsic information memory; memory conflict problem; parallel decoding; turbo codes;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:20020916
Filename :
1047099
Link To Document :
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