Title :
3-D WiRED: A Novel WIDE I/O DRAM With Energy-Efficient 3-D Bank Organization
Author :
Thakkar, Ishan ; Pasricha, Sudeep
Author_Institution :
Colorado State Univ., Fort Collins, CO, USA
Abstract :
WIDE I/O DRAM is a promising 3-D memory architecture for low-power/highperformance computing. This paper proposes a new WIDE I/O DRAM architecture to reduce access latency and energy consumption at the same time, which shows the possibility of further optimization of the WIDE I/O DRAM architecture and the impact of TSV usage in the memory architecture on the performance and energy consumption.
Keywords :
DRAM chips; memory architecture; optimisation; 3D WiRED; 3D memory architecture; TSV usage; energy-efficient 3D bank organization; low-power high performance computing; novel WIDE I/O DRAM; Computer architecture; DRAM chips; Electric breakdown; Energy efficiency; Parallel processing; Random access memory; 3D-DRAM; Wide I/O; energy-efficiency;
Journal_Title :
Design & Test, IEEE
DOI :
10.1109/MDAT.2015.2440411
