DocumentCode :
866446
Title :
StepNP: a system-level exploration platform for network processors
Author :
Paulin, Pierre G. ; Pilkington, Chuck ; Bensoudane, Essaid
Author_Institution :
Syst. Chip Platform Autom. Group, STMicroelectronics, Ottawa, Ont., Canada
Volume :
19
Issue :
6
fYear :
2002
Firstpage :
17
Lastpage :
26
Abstract :
The fast-changing communications market requires high-performance yet flexible network-processing platforms. StepNP is an exploratory network processor simulation environment for exploring applications, multiprocessor network-processing architectures, and SoC tools. Supporting model interaction, instrumentation, and analysis, the platform lets R&D teams easily add new processors, coprocessors, and interconnects.
Keywords :
computer architecture; coprocessors; multiprocessing systems; system-on-chip; telecommunication computing; virtual machines; SoC tools; StepNP; analysis; communications; coprocessors; exploratory network processor simulation environment; high-performance flexible network processing platforms; instrumentation; interconnects; model interaction; multiprocessor network processing architectures; system-level exploration platform; Application software; Bandwidth; Computer architecture; Coprocessors; Delay; Engines; Ethernet networks; Hardware; Multithreading; Yarn;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/MDT.2002.1047740
Filename :
1047740
Link To Document :
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