DocumentCode
866862
Title
A new dual gate design for low current pulse operation in 16 Mb ion-implanted bubble memory devices
Author
Sato, T. ; Saito, K. ; Hiroshima, M. ; Yanai, M. ; Toyooka, T. ; Takeshita, M. ; Suzuki, R.
Author_Institution
Hitachi Ltd., Chiba, Japan
Volume
26
Issue
5
fYear
1990
fDate
9/1/1990 12:00:00 AM
Firstpage
2514
Lastpage
2516
Abstract
A design for a dual gate which has both pseudoswap and block-replicate functions for 16-Mb ion-implanted bubble memory devices has been proposed and shown by Sato et al. (1987) to reduce the operation current-pulse amplitude. The dual gate is composed of a pair of hair-pin conductor patterns in two layers and ion-implanted tracks for the major line and the minor loop corner. The current pulses are applied through the hair-pin conductor patterns to stretch, cut, or annihilate bubbles for the operation of the dual gate. The functions of the dual gate were realized with low current pulses of less than 150 mA using 0.8-μm-diameter bubbles. It is therefore confirmed that the dual gate with low-current operation makes the 16-Mb ion-implanted bubble memory devices more practical
Keywords
magnetic bubble memories; 16 Mbit; block-replicate functions; dual gate design; hair-pin conductor patterns; ion-implanted bubble memory devices; low current pulse operation; major line; minor loop corner; operation current-pulse amplitude; pseudoswap; Conductors; Laboratories; Magnetic fields; Magnetization; Pulse generation; Tracking loops;
fLanguage
English
Journal_Title
Magnetics, IEEE Transactions on
Publisher
ieee
ISSN
0018-9464
Type
jour
DOI
10.1109/20.104781
Filename
104781
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