• DocumentCode
    867355
  • Title

    Observation and Utilization of Boron Segregation in Trench MOSFETs to Improve Figure of Merit (FOM)

  • Author

    Wang, Hao ; Xu, H. P Edward ; Ng, Wai Tung ; Fukumoto, Kenji ; Ishikaw, Akira ; Furukawa, Yuichi ; Imai, Hisaya ; Naito, Takashi ; Sato, Nobuyuki ; Sakai, Kimio ; Tamura, Satoru ; Takasuka, K.

  • Author_Institution
    Dept. of Mater. Sci. & Eng., Univ. of Toronto, Toronto, ON
  • Volume
    29
  • Issue
    11
  • fYear
    2008
  • Firstpage
    1239
  • Lastpage
    1241
  • Abstract
    We report the observation and utilization of boron segregation in trench MOSFETs (UMOS) to reduce on-resistance. A trenched LOCOS process has been applied to a UMOS structure to reduce the gate-to-source overlap capacitance (C gs), and it is observed that not only 40% reduction in C gs is achieved but also 45% reduction in specific on-resistance (R on, sp). Figure of merit is improved by 58%. TSUPREM-4 doping profile simulation at the silicon and oxide interface revealed the presence of boron segregation. On-resistance reduction is attributed by the shortened vertical channel length due to boron segregation.
  • Keywords
    MOSFET; oxidation; LOCOS; figure of merit; specific on-resistance; trench MOSFETs; vertical channel length; Boron segregation; figure of merit (FOM); on-resistance; trench MOSFETs (UMOS); trenched LOCOS process;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/LED.2008.2004971
  • Filename
    4627437
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=867355