Title :
Characterizing the Electrical Properties of a Novel Junctionless Poly-Si Ultrathin-Body Field-Effect Transistor Using a Trench Structure
Author :
Mu-Shih Yeh ; Yung-Chun Wu ; Min-Hsin Wu ; Ming-Hsien Chung ; Yi-Ruei Jhan ; Min-Feng Hung
Author_Institution :
Dept. of Eng. & Syst. Sci., Nat. Tsing Hua Univ., Hsinchu, Taiwan
Abstract :
Ultrathin channel trench junctionless poly-Si field-effect transistor (trench JL-FET) with a 2.4-nm channel thickness is experimentally demonstrated. Dry etching process is used to form trench structures, which define channel thickness (TCH) and gate length (LG). These devices (LG = 0.5 μm) show excellent performance in terms of steep subthreshold swing (100 mV/decade) and high ION/IOFF current ratio (106A/A) and practically negligible drain-induced barrier lowering (~0 mV/V). The ION current of the trench JL-FET can be further increased by the quantum confinement effect. Importantly, owing to its excellent device characteristics and simplicity of fabrication, the trench JL-FET has great potential for using in advanced 3-D-stacked IC applications.
Keywords :
elemental semiconductors; etching; field effect transistors; silicon; Si; advanced 3D-stacked IC application; channel thickness; device characteristics; drain-induced barrier lowering; dry etching process; electrical properties; fabrication simplicity; gate length; junctionless poly-silicon ultrathin-body field-effect transistor; on-off current ratio; quantum confinement effect; steep subthreshold swing; trench structure; ultrathin-channel trench JL-FET; Fabrication; Logic gates; Performance evaluation; Silicon; Thin film transistors; Trench junctionless field-effect transistor (trench JL-FET); nanowires (NWs); three-dimensional (3-D); trench junctionless field-effect transistor (trench JL-FET);
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2014.2378785
