DocumentCode
867492
Title
A worst-case analysis of tunnel-doide threshold-logic design
Author
Chen, Y.B.
Volume
53
Issue
1
fYear
1965
Firstpage
103
Lastpage
104
Keywords
Artificial intelligence; Coupling circuits; Current supplies; Diodes; Inductance; Logic circuits; Logic devices; Performance analysis; Switching circuits; Weight control;
fLanguage
English
Journal_Title
Proceedings of the IEEE
Publisher
ieee
ISSN
0018-9219
Type
jour
DOI
10.1109/PROC.1965.3553
Filename
1445483
Link To Document