• DocumentCode
    868238
  • Title

    Multi-Channel Field-Effect Transistor (MCFET)—Part II: Analysis of Gate Stack and Series Resistance Influence on the MCFET Performance

  • Author

    Bernard, Emilie ; Ernst, Thomas ; Guillaumot, Bernard ; Vulliet, Nathalie ; Garros, Xavier ; Coronel, Philippe ; Skotnicki, Thomas ; Deleonibus, Simon ; Faynot, Olivier

  • Volume
    56
  • Issue
    6
  • fYear
    2009
  • fDate
    6/1/2009 12:00:00 AM
  • Firstpage
    1252
  • Lastpage
    1261
  • Abstract
    Three-dimensional multi-channel field-effect transistor (MCFET) gate stack and series resistance are investigated and optimized by specifically developed integration processes, characterization methods, and numerical simulations. First, the impact of a TiN/HfO2 gate stack on embedded-gate MCFET structure performance is studied. Both TiN/SiO2 and N+poly-Si/SiO2 gate stacks were introduced in the MCFET to compare the carrier mobility behavior (300 K down to 20 K), the gate leakage current, and the negative bias temperature instability. The obtained electrical data are then compared with a planar FD-SOI reference, highlighting some specific challenges linked to the introduction of a high- kappa/metal gate stack in embedded cavities. On the other hand, it is shown how the series resistance is intrinsically increased by the 3-D configuration. We also show how this increase can be attenuated significantly by optimizing the source/drain (S/D) shape, the implantation conditions, and the S/D silicide position.
  • Keywords
    carrier mobility; dielectric materials; electrical resistivity; elemental semiconductors; field effect transistors; hafnium compounds; high-k dielectric thin films; leakage currents; semiconductor device models; silicon; silicon compounds; titanium compounds; 3D configuration; Si-SiO2; TiN-HfO2; TiN-SiO2; carrier mobility; embedded cavities; embedded-gate MCFET structure; gate leakage current; high-kappa gate stack; metal gate stack; multichannel field-effect transistor; negative bias temperature instability; planar FD-SOI reference; series resistance; source-drain shape; temperature 300 K to 20 K; three-dimensional MCFET simulations; Electric resistance; FETs; Hafnium oxide; Leakage current; Negative bias temperature instability; Numerical simulation; Optimization methods; Performance analysis; Silicides; Tin; 2-D numerical simulation; 3-D; $R_{rm series}$; Gate leakage current; mobility; multichannel field-effect transistors (MCFETs); negative bias temperature instability (NBTI);
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2009.2019155
  • Filename
    4926177