DocumentCode :
868356
Title :
Reconfigurable Hardware Architecture of a Shape Recognition System Based on Specialized Tiny Neural Networks With Online Training
Author :
Moreno, Félix ; Alarcón, Jaime ; Salvador, Rubén ; Riesgo, Teresa
Author_Institution :
Dept. de Autom., Ing. Electron. e Inf. Ind., Univ. Politec. de Madrid, Madrid, Spain
Volume :
56
Issue :
8
fYear :
2009
Firstpage :
3253
Lastpage :
3263
Abstract :
Neural networks are widely used in pattern recognition, security applications, and robot control. We propose a hardware architecture system using tiny neural networks (TNNs) specialized in image recognition. The generic TNN architecture allows for expandability by means of mapping several basic units (layers) and dynamic reconfiguration, depending on the application specific demands. One of the most important features of TNNs is their learning ability. Weight modification and architecture reconfiguration can be carried out at run-time. Our system performs objects identification by the interpretation of characteristics elements of their shapes. This is achieved by interconnecting several specialized TNNs. The results of several tests in different conditions are reported in this paper. The system accurately detects a test shape in most of the experiments performed. This paper also contains a detailed description of the system architecture and the processing steps. In order to validate the research, the system has been implemented and configured as a perceptron network with back-propagation learning, choosing as reference application the recognition of shapes. Simulation results show that this architecture has significant performance benefits.
Keywords :
backpropagation; image recognition; learning (artificial intelligence); multilayer perceptrons; reconfigurable architectures; shape recognition; backpropagation learning; image recognition; objects identification; pattern recognition; perceptron network; reconfigurable hardware architecture; robot control; shape recognition system; specialized tiny neural network; system architecture; Neural network hardware implementation; recognition; run-time learning;
fLanguage :
English
Journal_Title :
Industrial Electronics, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0046
Type :
jour
DOI :
10.1109/TIE.2009.2022076
Filename :
4926188
Link To Document :
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