Title :
100 Gbit/s multiplexing and demultiplexing IC operations in InP HEMT technology
Author :
Murata, K. ; Sano, K. ; Sugitani, S. ; Sugahara, H. ; Enoki, T.
Author_Institution :
NTT Photonics Labs., NTT Corp., Kanagawa, Japan
fDate :
11/21/2002 12:00:00 AM
Abstract :
The 100 Gbit/s multiplexing operation of a selector IC and the demultiplexing operation of a D-type flip-flop (D-FF) using a production-level 0.1 μm-gate InP HEMT IC technology is described. Eye-openings of the selector IC at 100 Gbit/s and its error-free operation were confirmed using a test chip containing the selector and the D-FF. To the authors´ best knowledge, this is the first report of 100 Gbit/s operation of a transistor-based integrated circuit.
Keywords :
HEMT integrated circuits; III-V semiconductors; demultiplexing; flip-flops; high-speed integrated circuits; indium compounds; multiplexing; 0.1 micron; 100 Gbit/s; D-type flip-flop; InP; InP HEMT IC technology; demultiplexing operation; high-speed integrated circuit; multiplexing operation; selector IC;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20021067
