DocumentCode :
868466
Title :
Efficient Resource Utilization for an Extensible Processor Through Dynamic Instruction Set Adaptation
Author :
Bauer, Lars ; Shafique, Muhammad ; Henkel, Jörg
Author_Institution :
Dept. of Comput. Sci., Univ. of Karlsruhe, Karlsruhe
Volume :
16
Issue :
10
fYear :
2008
Firstpage :
1295
Lastpage :
1308
Abstract :
State-of-the-art application-specific instruction set processors (ASIPs) allow the designer to define individual prefabrication customizations, thus improving the degree of specialization towards the actual application requirements, e.g., the computational hot spots. However, only a subset of hot spots can be targeted to keep the ASIP within a reasonable size. We propose a modular special instruction composition with multiple implementation possibilities per special instruction, compile-time embedded instructions to trigger a run-time adaptation of the instruction set, and a run-time system that dynamically selects an appropriate variation of the instruction set, i.e., a situation-dependent beneficial implementation for each special instruction. We thereby achieve a better efficiency of resource usage of up to 3.0 times (average 1.4 times) compared with current state-of-the-art ASIPs, resulting in a 3.1 times (average 1.4 times) improved application performance (compared with a general purpose processor up to 25.7 times and average 17.6 times).
Keywords :
application specific integrated circuits; instruction sets; microprocessor chips; application-specific instruction set processors; compile-time embedded instructions; dynamic instruction set adaptation; extensible processor; modular special instruction composition; prefabrication customizations; resource utilization; situation-dependent beneficial implementation; Application specific processors; Computer aided instruction; Field programmable gate arrays; Hardware; Reconfigurable architectures; Resource management; Runtime; Space exploration; Table lookup; Videoconference; Application-specific instruction set processor (ASIP); RISPP; extensible processor; modular Special Instructions; reconfigurable architecture; rotating instruction set processing platform; run-time adaptation;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2008.2002430
Filename :
4629342
Link To Document :
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