Title :
Interfield noise and cross color reduction IC for flicker-free TV receivers
Author :
Grafe, Thomas ; Scheffler, Guenter
Author_Institution :
Siemens AG Munich, West Germany
fDate :
8/1/1988 12:00:00 AM
Abstract :
The digital video signal processor described is a member of a chip set built for multistandard TV sets containing a field memory. The updated system removes large-area flicker, reduces noise and cross color distortion, and provides several display features. The picture processor is designed in 2.5- mu m NMOS technology having a chip size of approximately 6*7 mm2. It is mounted in a plastic leadless chip carrier package with 68 pins. The IC has a single supply voltage of 5 V. The input and output signals are TTL compatible.
Keywords :
MOS integrated circuits; digital signal processing chips; random noise; television receivers; television reception; television standards; television systems; NMOS technology; chip set; cross colour distortion; digital video signal processor; field memory; large-area flicker; leadless chip carrier package; multistandard TV sets; noise; picture processor; 1f noise; Colored noise; Displays; Integrated circuit noise; MOS devices; Noise reduction; Plastics; Process design; Signal processing; TV receivers;
Journal_Title :
Consumer Electronics, IEEE Transactions on
