DocumentCode
868803
Title
Circuit design for a high-T/sub c/ Josephson sampler
Author
Hidaka, M. ; Tsai, J.S.
Author_Institution
Fundamental Res. Labs., NEC Corp., Tsukuba, Japan
Volume
5
Issue
2
fYear
1995
fDate
6/1/1995 12:00:00 AM
Firstpage
3353
Lastpage
3356
Abstract
We propose a high-speed and high-sensitivity sampler circuit using high T/sub c/ superconducting (HTS) Josephson junctions. This circuit consists of five non-latching junctions, superconducting lines and a superconducting ground-plane. A main feature of this circuit is a non-latching comparator junction whose switching generates a circulating current in a superconducting loop. Computer simulation and prototype layout were performed to study its ability and feasibility.<>
Keywords
high-temperature superconductors; signal sampling; superconducting integrated circuits; circuit design; computer simulation; high T/sub c/ superconducting Josephson junctions; high-speed high-sensitivity sampler; layout; nonlatching comparator junction; superconducting ground-plane; superconducting lines; superconducting loop; Circuit simulation; Circuit synthesis; Computational modeling; Critical current; High temperature superconductors; Inductance; Josephson junctions; Pulse circuits; Switches; Turning;
fLanguage
English
Journal_Title
Applied Superconductivity, IEEE Transactions on
Publisher
ieee
ISSN
1051-8223
Type
jour
DOI
10.1109/77.403310
Filename
403310
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