DocumentCode :
869188
Title :
Reducing SoC simulation and development time
Author :
Rowen, Chris
Volume :
35
Issue :
12
fYear :
2002
fDate :
12/1/2002 12:00:00 AM
Firstpage :
29
Lastpage :
34
Abstract :
Looks at how, by using extensible processors, designers can develop and verify task engines for many embedded system-on-chip tasks more quickly than by using the traditional RTL-defined hardware design approach.
Keywords :
circuit CAD; circuit simulation; digital simulation; embedded systems; integrated circuit design; system-on-chip; SoC simulation; development time; embedded system-on-chip tasks; simulation time; system-on-chip design; Bandwidth; Computer bugs; Costs; Design methodology; Engines; Hardware; Microprocessors; Protocols; Silicon; System-on-a-chip;
fLanguage :
English
Journal_Title :
Computer
Publisher :
ieee
ISSN :
0018-9162
Type :
jour
DOI :
10.1109/MC.2002.1106176
Filename :
1106176
Link To Document :
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