Feasibility of analogue computation for image processing applications

A processing cell consisting of analogue devices is proposed for the implementation of a 2D weighted averaging algorithm for image processing applications. The major component used is the MOS transistor in CMOS configuration, implementable in VLSI technology. Representative simulation results are given, demonstrating the accuracy of computation and high performance achieved by the proposed circuit. Finally, the desirable features of analogue computation, introduced by the above circuit, are discussed with respect to the corresponding digital circuitry.