DocumentCode
869959
Title
An Analysis of Single Event Upset Dependencies on High Frequency and Architectural Implementations within Actel RTAX-S Family Field Programmable Gate Arrays
Author
Berg, Melanie ; Wang, Jih-Jong ; Ladbury, Ray ; Buchner, Steve ; Kim, Hak ; Howard, Jim ; LaBel, Ken ; Phan, Anthony ; Irwin, Tim ; Friendlich, Mark
Author_Institution
MEI Technol. Inc, NASA Goddard Space Flight Center, Greenbelt, MD
Volume
53
Issue
6
fYear
2006
Firstpage
3569
Lastpage
3574
Abstract
In order to investigate frequency and architectural effects on Single Event Upset cross sections within RTAX-S FPGA devices, a novel approach to high speed testing is implemented. Testing was performed at variable speeds ranging from 15 MHz to 150 MHz
Keywords
design for testability; field programmable gate arrays; high-frequency effects; 15 to 150 MHz; Actel RTAX-S FPGA; architectural effects; field programmable gate arrays; high frequency effects; single event upset; Clocks; Field programmable gate arrays; Frequency; Logic devices; NASA; Pulse inverters; Shift registers; Single event upset; Space technology; Testing; Actel; FPGA; TMR; anti-fuse; high frequency; single event upsets; transients;
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/TNS.2006.886043
Filename
4033231
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