DocumentCode :
870035
Title :
An SEU-Robust Configurable Logic Block for the Implementation of a Radiation-Tolerant FPGA
Author :
Bonacini, Sandro ; Faccio, Federico ; Kloukinas, Kostas ; Marchioro, Alessandro
Author_Institution :
Inst. Nat. Polytech. de Grenoble
Volume :
53
Issue :
6
fYear :
2006
Firstpage :
3408
Lastpage :
3416
Abstract :
Within the perspective of the development of a radiation-tolerant SEU-robust reprogrammable FPGA, a user-configurable Logic Block was designed in a CMOS 0.25 mum technology. The configuration bits are stored in SEU-robust registers as well as the user data. The design takes care of minimizing the possibility of SET coming from the combinatorial logic. The Logic Block can implement any boolean expression of 4 variables, has a carry propagation infrastructure and a user-register. A set of Logic Blocks can be organized to form more complex logic functions. A test chip was fabricated and tested in a heavy-ion beam facility. Testing demonstrated the SEU robustness of the circuit up to an LET of 79.6 cm2 MeV/mg and a small sensitivity at higher LETs
Keywords :
CMOS logic circuits; field programmable gate arrays; integrated circuit design; radiation hardening (electronics); 0.25 micron; CMOS technology; LET; SET; SEU-robust registers; boolean expression; carry propagation infrastructure; combinatorial logic; complex logic functions; configuration bits; heavy-ion beam facility; radiation-tolerant SEU-robust reprogrammable FPG; test chip fabrication; user data; user-configurable logic block design; user-register; Aerospace electronics; CMOS logic circuits; CMOS technology; Circuit testing; Field programmable gate arrays; Large Hadron Collider; Logic design; Logic functions; Single event upset; Space technology; FPGA; SET; SEU-robust; radiation-tolerant;
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/TNS.2006.884097
Filename :
4033261
Link To Document :
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