DocumentCode :
870063
Title :
Learning automata-based bus arbitration for shared-medium ATM switches
Author :
Obaidat, Mohammad S. ; Papadimitriou, Georgios I. ; Pomportsis, Andreas S. ; Laskaridis, Haralambos S.
Author_Institution :
Dept. of Comput. Sci., Monmouth Univ., West Long Branch, NJ, USA
Volume :
32
Issue :
6
fYear :
2002
fDate :
12/1/2002 12:00:00 AM
Firstpage :
815
Lastpage :
820
Abstract :
Although new high-bandwidth network technologies are being introduced and widely deployed, asynchronous transfer mode (ATM) is still considered one of the most important network technologies currently in use. A number of ATM switch architectures have been proposed in the literature. However, industry has shown that is better to use the well-known shared-medium technique in the design of these ATM switches. In this paper, four variations of a new distributed scheme are proposed for the arbitration of a shared bus of an ATM switch. These schemes are based on learning automata. By taking advantage of the bursty nature of ATM traffic, the new arbitration scheme demonstrates superb performance compared to the time division multiple access (TDMA) scheme.
Keywords :
asynchronous transfer mode; learning automata; system buses; telecommunication traffic; bursty traffic; distributed scheme; learning automata-based bus arbitration; shared-medium ATM switches; Access protocols; Asynchronous transfer mode; B-ISDN; Distributed algorithms; Learning automata; Multiprocessor interconnection networks; Permission; Quality of service; Switches; Time division multiple access;
fLanguage :
English
Journal_Title :
Systems, Man, and Cybernetics, Part B: Cybernetics, IEEE Transactions on
Publisher :
ieee
ISSN :
1083-4419
Type :
jour
DOI :
10.1109/TSMCB.2002.1049615
Filename :
1049615
Link To Document :
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