DocumentCode :
870292
Title :
Microwave frequency crosstalk model of redistribution line patterns on wafer level package
Author :
Sung, Myunghee ; Kim, Namhoon ; Lee, Junwoo ; Kim, Hyungsoo ; Choi, Baek Kyu ; Kim, Jae-Myun ; Hong, Joon-Ki ; Kim, Joungho
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Korea Adv. Inst. of Sci. & Technol., Taejon, South Korea
Volume :
25
Issue :
2
fYear :
2002
fDate :
5/1/2002 12:00:00 AM
Firstpage :
265
Lastpage :
271
Abstract :
As the operating frequency of systems increases above the gigahertz frequency range, the electrical performance of a package becomes more critical. Wafer level package (WLP) is a promising solution for future high-speed packaging needs. Because the length of the interconnection lines on the WLP is limited to die size, the WLP has a minimum number of electrical parasitic elements. Because the crosstalk generates significant unwanted noise in nearby lines, causing problems of skew, delay, logic faults, and radiated emission, the crosstalk phenomena is drawing more attention than ever among the electrical characteristics of the WLP. Consequently, the modeling of the crosstalk parameters of the WLP is very important when used in high-speed systems. In this paper, we first report the crosstalk model parameters of the WLP, especially for the redistribution layer. These can be easily embedded into SPICE circuit simulation. The model is represented by the distributed lumped circuit elements, such as the mutual capacitance and the mutual inductance. The crosstalk model was extracted from two-step on-wafer S-parameter measurements and was fitted to the measurements made at up to 5 GHz.
Keywords :
SPICE; capacitance; chip scale packaging; circuit simulation; crosstalk; inductance; integrated circuit modelling; packaging; radiofrequency integrated circuits; 0 to 5 GHz; SPICE circuit simulation; die size; electrical parasitic elements; electrical performance; gigahertz frequency range; high-speed packaging needs; interconnection lines; logic faults; microwave frequency crosstalk model; mutual capacitance; mutual inductance; on-wafer S-parameter measurements; operating frequency; radiated emission; redistribution layer; redistribution line patterns; unwanted noise; wafer level package; Character generation; Crosstalk; Delay; Integrated circuit interconnections; Logic; Microwave frequencies; Noise generators; Packaging; Semiconductor device modeling; Wafer scale integration;
fLanguage :
English
Journal_Title :
Advanced Packaging, IEEE Transactions on
Publisher :
ieee
ISSN :
1521-3323
Type :
jour
DOI :
10.1109/TADVP.2002.803306
Filename :
1049638
Link To Document :
بازگشت