Modeling Single-Event Upsets in 65-nm Silicon-on-Insulator Semiconductor Devices

Author

Kleinosowski, Aj ; Oldiges, Phil ; Williams, Richard Q. ; Solomon, Paul M.

Author_Institution

IBM Austin Res. Lab., TX

Volume

53

Issue

6

fYear

2006

Firstpage

3321

Lastpage

3328

Abstract

This paper describes a technique for modeling single-event upsets due to ionizing radiation in a partially depleted silicon-on-insulator (SOI) MOSFET device. Two current pulses are used, one connected between the drain and body of the device, and the other connected between the body and source of the device. The physical representation of these two current sources is described in detail. Circuit modeling is verified against drift-diffusion field solver modeling and hardware experiments. The effects of manufacturing variation and operating condition variation on the qCrit of circuit storage elements are explored

Keywords

MOSFET; alpha-particle effects; diffusion; semiconductor device models; silicon-on-insulator; alpha particle ionizing radiation; circuit modeling; circuit storage elements; critical amount of charge; drift-diffusion field solver modeling; hardware experiments; manufacturing variation effect; partially depleted silicon-on-insulator MOSFET device; qCrit; silicon-on-insulator semiconductor devices; single-event upsets; Circuit simulation; Hardware; Ionizing radiation; Laboratories; Latches; Random access memory; Semiconductor devices; Semiconductor materials; Silicon on insulator technology; Space exploration; Alpha particle; modeling; radiation event; single-event upset; soft error;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/TNS.2006.884353

Filename

4033589