DocumentCode
871043
Title
Analytic model for field-plate-edge breakdown of planar devices terminated with field plate and semiresistive layer
Author
Chung, S.-K.
Author_Institution
Div. of Comput., Electron. & Telecommun. Eng., Yanbian Univ. of Sci. & Technol., St.Yanji City, China
Volume
151
Issue
1
fYear
2004
Firstpage
21
Lastpage
24
Abstract
An analytic model for calculating the surface field of high-voltage devices terminated with a field plate and SIPOS (semiresistive polycrystalline) layer is presented. This allows determination of the breakdown voltage at the field-plate edge in terms of the field-plate length, the effective length of the SIPOS layer, the thickness of oxide buffer layer, and the silicon doping concentration. The results show a fair agreement with the numerical simulations as well as the experimental results reported.
Keywords
electric fields; power semiconductor devices; semiconductor device breakdown; semiconductor device models; SIPOS layer effective length; breakdown voltage; device breakdown analytic model; field plate terminated devices; field-plate length; field-plate-edge breakdown; high-voltage device surface field; high-voltage power devices; oxide buffer layer thickness; planar devices; semiresistive layer terminated devices; silicon doping concentration;
fLanguage
English
Journal_Title
Science, Measurement and Technology, IEE Proceedings -
Publisher
iet
ISSN
1350-2344
Type
jour
DOI
10.1049/ip-smt:20030852
Filename
1262436
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