Title :
A new ATPG technique (MultiDetect) for testing of analog macros in mixed-signal circuits
Author :
Varaprasad, B.K.S.V.L. ; Patnaik, Lalit Mohan ; Jamadagni, Hirisave S. ; Agrawal, V.K.
Author_Institution :
ISRO Satellite Centre, Bangalore, India
Abstract :
A new test-set selection technique based on the frequency-domain testing of analog circuits is presented in this paper. We propose a new automatic test pattern generation (ATPG) method known as MultiDetect for testing linear time invariant (LTI) circuits. The proposed technique is best suited for use of existing building blocks in systems-on-chip for implementation of an on-chip test-signal generator and test-response analyzer. The generated test set with the MultiDetect method can effectively detect and diagnose both soft and hard faults and does not require any precision analog signal sources or signal measurement circuits when implemented as built-in self-test (BIST). Testing of analog blocks based on circuit-transfer function makes our ATPG a general purpose method for all kinds of LTI circuits. A new novel test method causing the device under test to saturate or get out of saturation, to detect a fault with simple detection hardware, is also introduced in this paper. In our proposed novel test scheme, usage of a single sinusoid as a test signal when compared to multitone signal, and detection of faults with digital counting technique, facilitate the test implementation with simple BIST hardware and make testing more cost effective. The sinusoid is a very useful waveform for testing and analyzing LTI circuits. In the steady state, both the input and output of a stable LTI circuit are sinusoids of the same frequency. The relationship between the amplitudes and phase angles of the input and output sinusoids is frequency-dependent. Identification of a sinusoid that detects more faults results in an optimized test signal set. The technique used in the MultiDetect method for identification of a sinusoid results in an efficient compacted test set. The search for fault diagnosis is restricted to a limited set of faults, making diagnosis fast in the MultiDetect method. A methodology for test-set compaction of the MultiDetect technique is described and results of experiments on various test circuits are discussed. The proposed method is seen to be efficient for low-power applications. The experimental results show that the testing of LTI circuits using the MultiDetect technique for the benchmark circuits achieves the required fault coverage with much shorter testi- ng time.
Keywords :
analogue integrated circuits; automatic test pattern generation; built-in self test; fault diagnosis; integrated circuit testing; mixed analogue-digital integrated circuits; system-on-chip; ATPG; LTI circuits; MultiDetect; analog BIST; analog circuits; analog signal sources; automatic test pattern generation; benchmark circuits; built-in self-test; circuit testing; circuit-transfer function; digital counting; fault detection; fault diagnosis; frequency-domain testing; linear time invariant; mixed-signal circuits; mixed-signal testing; multitone signal; on-chip test-response analyzer; on-chip test-signal generator; signal measurement circuits; signature analysis; sinusoid; systems-on-chip; test-set selection; Automatic test pattern generation; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Electrical fault detection; Fault detection; Fault diagnosis; Hardware; System testing;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
DOI :
10.1109/TCAD.2003.822110