DocumentCode
871758
Title
Beam-Lead Sealed-Junction Semiconductor Memory with Minimal Cell Complexity
Author
Iwersen, John E. ; Wuorinen, John H., Jr. ; Murphy, Bernard T. ; D´Stefan, D.J.
Volume
2
Issue
4
fYear
1967
fDate
12/1/1967 12:00:00 AM
Firstpage
196
Lastpage
201
Abstract
A novel 100-ns nondestructively-read semiconductor memory is described. Sixteen simple bipolar flip-flops are integrated on a 30 X 38 mil beam-leaded chip. Memory arrays are produced by bonding chips on large-area substrates. Performance of a 64-word 16-bits-per-word memory system is reported.
Keywords
Large-scale integration; Semiconductor memories; Associate members; Bonding; Complexity theory; Flip-flops; Integrated circuit interconnections; Read-write memory; Resistors; Semiconductor memory; Substrates; Voltage;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1967.1049818
Filename
1049818
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