DocumentCode :
871802
Title :
Automatic Test Generation Methods for Large Scale Integrated Logic
Author :
Jones, Edwin R. ; Mays, C. Hugh
Volume :
2
Issue :
4
fYear :
1967
fDate :
12/1/1967 12:00:00 AM
Firstpage :
221
Lastpage :
226
Abstract :
Methods for generating tests for combinatorial and sequential logic circuits are discussed. A survey of existing techniques is given. An integrated approach that uses many of the existing methods plus new techniques is described and illustrated.
Keywords :
Large-scale integration; Manufacturing testing; Automatic logic units; Automatic testing; Circuit faults; Circuit testing; Fault detection; Integrated circuit testing; Large scale integration; Logic testing; Sequential analysis; Sequential circuits;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.1967.1049822
Filename :
1049822
Link To Document :
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