• DocumentCode
    871856
  • Title

    Complementary Si MESFET concept using silicon-on-sapphire technology

  • Author

    Tove, Per A. ; Bohlin, Kjell ; Masszi, Ferenc ; Norde, H ; Nylander, J ; Tiren, J ; Magnusson, U.

  • Author_Institution
    Dept. of Electron, Inst. of Technol., Uppsala Univ., Sweden
  • Volume
    9
  • Issue
    1
  • fYear
    1988
  • Firstpage
    47
  • Lastpage
    49
  • Abstract
    Complementary Si MESFETs (CMES) for integrated circuits using silicon-on-sapphire are described. Not only the gate, but also the source and drain of the n-transistors and p-transistors are Schottky junctions, using very high barrier heights for the gate and low barrier heights for source and drain. Only two Schottky metals are used: one, Ir or Pt, giving a high barrier on nSi, and hence low on pSi; the other, Er or Tb, showing the opposite behavior. The basic differences between MES and MOS are pointed out and design criteria for CMES inverters using normally-off type transistors are given.<>
  • Keywords
    Schottky gate field effect transistors; field effect integrated circuits; integrated circuit technology; semiconductor-insulator boundaries; CMES inverters; Er; Ir; Pt; SOS complementary MESFETs; Schottky junctions; Si; Si-Al/sub 2/O/sub 3/; Tb; barrier heights; integrated circuits; n-transistors; normally-off type transistors; p-transistors; CMOS technology; Doping; Energy consumption; Erbium; MESFETs; MOSFETs; Pulse inverters; Silicon; Steady-state; Transconductance;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/55.20409
  • Filename
    20409