DocumentCode
872189
Title
Inverter performance of deep-submicrometer MOSFETs
Author
Sai-Halasz, George A. ; Wordeman, Matthew R. ; Kern, D.P. ; Rishton, S. ; Ganin, E. ; Ng, H.Y. ; Moy, D. ; Chang, T.H.P. ; Dennard, Robert H.
Author_Institution
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Volume
9
Issue
12
fYear
1988
Firstpage
633
Lastpage
635
Abstract
Switching delay measurements are reported for self-aligned, almost fully scaled, liquid-nitrogen-temperature operation NMOS inverters with deep-submicrometer gate lengths. The shortest delay per stage of 13.1 ps was measured in 0.1- mu m gate-length circuits. Circuit simulations based on the measured device characteristics show that still shorter delay times can be reached with such a technology.<>
Keywords
MOS integrated circuits; delays; integrated logic circuits; logic gates; 0.1 micron; 13.1 ps; MOSFET; NMOS inverters; circuit simulations; deep-submicrometer gate lengths; delay times; switching delay; Circuits; Delay; Fabrication; Inverters; Length measurement; MOSFETs; Pulse measurements; Ring oscillators; Semiconductor device measurement; Transconductance;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/55.20419
Filename
20419
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