A Patterning-Based Strain Engineering for Sub-22 nm Node FinFETs

Author

Schmidt, Martin ; Suess, M.J. ; Barros, A.D. ; Geiger, Richard ; Sigg, Hans ; Spolenak, R. ; Minamisawa, R.A.

Author_Institution

Dept. of Electr. & Electron. Eng., Fed. Univ. of Santa Catarina, Florianopolis, Brazil

Volume

35

Issue

3

fYear

2014

fDate

Mar-14

Firstpage

300

Lastpage

302

Abstract

We propose a strain engineering approach that is based on the patterning and under etching of fins using strained Si grown on SiGe strain relaxed buffers. The method enhances the strain of the patterned Fins up to ~ 2.9 GPa without the need of epitaxial source and drain stressors. We report a systematic simulation study on the scaling of this method for the present and future technology nodes down to 7 nm. Finally, we estimate that the technique deliveries an electron mobility enhancement up to 87% for FinFETs, independent of the technology node.

Keywords

Ge-Si alloys; MOSFET; elemental semiconductors; etching; semiconductor growth; silicon; FinFET; electron mobility enhancement; fin etching; patterning-based strain engineering; silicon-germanium strain relaxed buffers; size 22 nm; strained silicon growth; systematic simulation study; technology node; Electron mobility; Etching; FinFETs; Silicon; Silicon germanium; Strain; Stress; FinFet; Strained Si; scaling; simulations; strain-relaxed-buffer;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2014.2300865

Filename

6730925