DocumentCode :
872720
Title :
Status of the IEEE P896 Future Backplane Bus
Author :
Gustavson, David B.
Author_Institution :
Computation Research Group Stanford Linear Accelerator Center Stanford University, Stanford CA 94305
Volume :
31
Issue :
1
fYear :
1984
Firstpage :
172
Lastpage :
174
Abstract :
The IEEE P896 Future Backplane Bus project has been influenced by and has influenced FASTBUS and several other contemporary bus designs. This paper summarizes the current status of that project, which is directed toward the needs of modern 32-bit microprocessor systems with multiple processors. Some of the technology developed for P896 will be important for future non-ECL implementations of FASTBUS and other buses. In particular, new bus drivers and receivers should greatly improve the performance and reliability of backplane buses and cable buses. The current status of the P896 serial bus is also summarized.
Keywords :
Backplanes; Binary search trees; Communication cables; Fastbus; History; Linear accelerators; Manufacturing; Microprocessors; Protocols; Standardization;
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/TNS.1984.4333237
Filename :
4333237
Link To Document :
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