DocumentCode :
872788
Title :
FASTBUS Processor Interface for VAX-11
Author :
Yasu, Yoshiji ; Arai, Yasuo ; Hayano, Ryugo ; Karita, Yukio ; Watase, Yoshiyuki ; Uema, Kenyu ; Kawaguchi, Fujio
Author_Institution :
National Laboratory for High Energy Physics (KEK) Oho-machi, Tsukuba-gun, Ibaraki, 305 Japan
Volume :
31
Issue :
1
fYear :
1984
Firstpage :
197
Lastpage :
200
Abstract :
FASTBUS Processor Interface (FPI), a high-speed interface which connects a FASTBUS cable segment to a VAX-family computer, has been developed at KEK in collaboration with DEC. The FPI overview, FPI implementation and benchmark results are discussed. In particular, it has been shown that FPI can transfer a 32-bit word every 200 nsec in the FASTBUS pipeline transfer mode. FPI conforms to the Nov. ´82 FASTBUS specifications, and is supported by the FASTBUS Standard Routines.
Keywords :
Circuit testing; Collaboration; Communication cables; Debugging; Fastbus; Integrated circuit interconnections; Laboratories; Logic design; Pipelines; Printed circuits;
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/TNS.1984.4333244
Filename :
4333244
Link To Document :
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