DocumentCode :
874717
Title :
CMOS Shift Register Circuits for Radiation-Tolerant VLSI´s
Author :
Hatano, Hiroshi ; Sakaue, Kenji ; Naruke, Kiyomi
Volume :
31
Issue :
5
fYear :
1984
Firstpage :
1034
Lastpage :
1038
Abstract :
A radiation-tolerant VLSI circuits investigation has been carried out using CMOS/SOS shift registers. Static and dynamic circuit performance degradation is discussed, based on MOS FET parameter shifts due to radiation effects, utilizing ¿-ray irradiation and SPICE simulation. Functionality, after radiation doses in excess of 105; rad (Si), is shown for circuits fabricated by radiation-hardened process. Radiation-tolerance superiority of clocked gate CMOS (C2MOS) shift register circuits to transfer gate shift register circuits is discussed, placing emphasis mainly on radiation-bias effects. Based on the above results, the C2MOS is proposed for use in radiation-tolerant SOS VLSI circuits.
Keywords :
CMOS technology; Circuit optimization; Degradation; Lead compounds; MOS devices; MOSFETs; Radiation effects; Shift registers; Threshold voltage; Very large scale integration;
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/TNS.1984.4333436
Filename :
4333436
Link To Document :
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