Title :
COS/MOS parallel processor array
Author :
Alaspa, Allan A. ; Dingwall, Andrew G F
fDate :
10/1/1970 12:00:00 AM
Abstract :
See abstr. B24941, C13648 of 1970.
Keywords :
Integrated circuits; integrated circuits; Adaptive arrays; Arithmetic; Decoding; Large scale integration; Logic arrays; Logic devices; Pins; Power generation economics; Power system economics; Time sharing computer systems;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1970.1050117
