Title :
Nonlinear JFET model for computer-aided circuit analysis
Abstract :
A simplified circuit model is proposed to represent the nonlinear d.c. and low-frequency small-signal operation of j.f.e.t.s. This model is particularly useful for computer-aided circuit analysis programs, such as the iterative nodal analysis program BIAS-3. Operation in the off, resistance, and pinch-off regions of the j.f.e.t. is included.
Keywords :
Computer-aided circuit analysis; computer-aided circuit analysis; Bipolar transistors; Breakdown voltage; Circuit analysis computing; Diodes; Equations; FETs; JFET circuits; Taylor series; Transconductance;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1971.1050158