DocumentCode
875902
Title
Bipolar dynamic memory cell
Author
Henn, Horst H.
Volume
6
Issue
5
fYear
1971
fDate
10/1/1971 12:00:00 AM
Firstpage
297
Lastpage
300
Abstract
A bipolar dynamic memory cell for use in a high-speed random- access memory consists of a cross-coupled pair of transistors and two diodes. Information is dynamically stored using a bistable charge distribution and must be refreshed at a frequency of 1 kHz by a SELECT operation. Standby power per memory cell is in the nanowatt range. The cell requires only 3 interconnect lines and can be fabricated with standard bipolar technology on 12-mil/SUP 2/ silicon area. Cycle time is limited by the speed of decoding, driving, and sensing circuits and is estimated to be 50 ns for a 512-bit RAM chip with complete on-chip decoding.
Keywords
Bipolar transistors; Random-access storage; Semiconductor storage devices; bipolar transistors; random-access storage; semiconductor storage devices; Capacitance; Costs; Decoding; Diodes; Fabrication; Frequency; Integrated circuit interconnections; Random access memory; Resistors; Silicon;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1971.1050190
Filename
1050190
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