Analog performance limitations of charge-transfer dynamic shift registers

Charge transfer dynamic shift register operation is described and a linearized analysis presented to relate the charge transfer properties to the performance of an n-stage register. An approximate small signal equivalent circuit is also derived to illustrate the similarities to a matched transmission line and the reactive and resistive elements of the line are related to charge transfer and loss characteristics of each stage of the register. The results are expected to be applicable to charge coupled devices and shift registers based on bucket brigade electronics.