DocumentCode :
876262
Title :
A 32-Bit Computer for Large Memory Applications on the FASTBUS
Author :
Kellner, R. ; Hong, J.P. ; Blossom, J.M.
Author_Institution :
Los Alamos National Laboratory E-10 Data Systems, MS K488 Los Alamos, NM 87545
Volume :
32
Issue :
4
fYear :
1985
Firstpage :
1306
Lastpage :
1308
Abstract :
A FASTBUS based 32-bit computer is being built at Los Alamos National Laboratory for use in systems requiring large fast memory in the FASTBUS environment. A separate local execution bus allows data reduction to proceed concurrently with other FASTBUS operations. The computer, which can operate in either master or slave mode, includes the National Semiconductor NS32032 chip set with demand paged memory management, floating point slave processor, interrupt control unit, timers, and time-of-day clock. The 16.0 megabytes of random access memory are interleaved to allow windowed direct memory access on and off the FASTBUS at 80 megabytes per second.
Keywords :
Application software; Clocks; Concurrent computing; Data systems; Ethernet networks; Fastbus; Hardware; Master-slave; Memory management; Registers;
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/TNS.1985.4333598
Filename :
4333598
Link To Document :
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