DocumentCode
876268
Title
Current Status of the FASTBUS Micro-VAX
Author
Siskind, Eric J.
Author_Institution
NYCB Real-Time Computing, Inc. Lattingtown, New York 11560-1025
Volume
32
Issue
4
fYear
1985
Firstpage
1309
Lastpage
1312
Abstract
The present hardware, firmware, and software design and status of the Fastbus Micro-VAX, a two board Fastbus module packaging of the DEC Micro-VAX II computing system, will be described. The hardware currently features an Intel 80186, equipped with 64 kB of ROM, 32 kB of RAM, and an 82586/82501 Ethernet port, as a front end I/O processor, plus a high bandwidth Fastbus interface implemented in semi-custom ECL 100K VLSI with the Motorola MCA2500ECL macrocell array. Standard 80186 firmware implements multiple Fastbus segment drivers and interrupt receivers software compatible with the UPI, a limited Fastbus interprocessor network, and emulations of the DEC DEQNA Ethernet interface and an MSCP disk interface. Software includes device drivers for the non-DEC devices, plus appropriate standard access subroutines for the Fastbus and network devices. This work is supported by the U. S. Department of Energy under SBIR Contract DE-AC01-83ER80078.
Keywords
Bandwidth; Ethernet networks; Fastbus; Hardware; Microprogramming; Packaging; Read only memory; Software design; Software packages; Software standards;
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/TNS.1985.4333599
Filename
4333599
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