DocumentCode :
876346
Title :
FASTBUS State Generator a Simple, High Speed Module for Testing FASTBUS Interfaces
Author :
Bowden, M. ; Kwarciany, R.
Author_Institution :
Fermi National Accelerator Laboratory, Batavia, IL 60510 (Operated by Universities Research Association under Contract to the U.S. Dept of Energy)
Volume :
32
Issue :
4
fYear :
1985
Firstpage :
1331
Lastpage :
1334
Abstract :
The FASTBUS State Generator provides a convenient method of independently controlling FASTBUS signals at normal bus speeds. Parallel generation or test of all FASTBUS lines at rates up to 25 MHz is possible using a simplified version of BASIC. The module may be programmed to emulate many of the sequential interface charateristics of standard FASTBUS devices
Keywords :
Algorithms; Circuit testing; Clocks; Counting circuits; Fastbus; Hardware; Laboratories; Life estimation; Microprocessors; Protocols;
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/TNS.1985.4333604
Filename :
4333604
Link To Document :
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