Title :
Optimisation technique in delay-equaliser design by digital computer
Author_Institution :
University of Belgrade, Department of Electronics, Faculty of Electrical Engineering, Belgrade, Yugoslavia
Abstract :
This letter presents the necessary modifications in a method of synthesis of phase equalisers, which has been described in a companion paper, in order to make it suitable for automatic computation of phase equalisers of minimum complexity that will correct the assigned delay characteristic to within a prescribed error. The flow diagram for the program organisation is also given.
Keywords :
circuit theory; computer applications;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19680096
