Predictable Power Saving Memory Controller Circuit Design for Embedded Static Random Access Memory

In this paper, we propose a predictable power saving memory controller circuit (PPSMCC) design for embedded static random access memory. An efficient method is proposed to monitor memory control signal and perform clock gating function that closes idle memory elements to save chip power. At the same time, we dynamically adjust frequency of memory element according to system requirement and achieve low power target. Besides, we propose a strategy to detect signal toggle of memory. When related port is not toggled during the timeslot, we deassert chip enable signal and related port to execute power saving mode for memory. According to the experimental results, the proposed predictable PPSMCC reduces the power consumption efficiency to achieve the low power target.