A multichip module design process for notebook computers

Author

Franzon, Paul D. ; Evans, Robert J.

Author_Institution

Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA

Volume

26

Issue

4

fYear

1993

fDate

4/1/1993 12:00:00 AM

Firstpage

41

Lastpage

49

Abstract

A packaging system design process for multichip modules (MCMs) is presented. The performance factors, cost factors, alternative packaging technologies, and packaging alternatives for daughter cards are discussed. The process is illustrated by applying to the design of a 80386SL chip that contains a 32-b integer central processing unit (CPU), memory management, bus control, and buffering, and a 82360SL companion chip that contains control functions for the system, I/O, peripherals, power management, and a majority of the glue logic required by the system.<>

Keywords

microprocessor chips; multichip modules; 32-b integer central processing unit; 80386SL chip; buffering; bus control; cost factors; glue logic; memory management; multichip module design process; notebook computers; packaging system design process; performance factors; Central Processing Unit; Centralized control; Control systems; Costs; Energy management; Memory management; Multichip modules; Packaging; Power system management; Process design;

fLanguage

English

Journal_Title

Computer

Publisher

ieee

ISSN

0018-9162

Type

jour

DOI

10.1109/2.206512

Filename

206512