Title :
A four-transistor four-quadrant analog multiplier using MOS transistors operating in the saturation region
Author_Institution :
Dept. of Electr. Eng., Swiss Federal Inst. of Technol., Zurich, Switzerland
fDate :
2/1/1993 12:00:00 AM
Abstract :
A four-quadrant analog multiplier using only four MOS transistors is presented. It is based on the square-law characteristic of a MOS transistor operating in the saturation region. Experimental results, obtained with a test circuit built with discrete devices and showing a linearity as high at 0.25% and bandwidths up to 28 and 40 MHz for both inputs, are presented
Keywords :
CMOS integrated circuits; analogue processing circuits; field effect transistor circuits; insulated gate field effect transistors; multiplying circuits; 28 to 40 MHz; MOS transistors; discrete devices; four-transistor four-quadrant analog multiplier; linearity; saturation region; square-law characteristic; Bandwidth; Bipolar transistors; CMOS technology; Circuit testing; Instruments; Linearity; MOS devices; MOSFETs; Signal processing; Voltage;
Journal_Title :
Instrumentation and Measurement, IEEE Transactions on
