Qualification Methodology for Sub-Micron ICs at the Low Noise Underground Laboratory of Rustrel

Author

Lesea, Austin ; Coulie, Karine Castellani ; Waysand, Georges ; Mauff, Joel Le ; Sudre, Christophe

Author_Institution

Xilinx, San Jose, CA

Volume

55

Issue

4

fYear

2008

Firstpage

2148

Lastpage

2153

Abstract

Alpha contamination has become a major concern in integrated circuits. To qualify packaging solutions for commercial, industrial, and aerospace/defense components, a program is described. The chosen methodology associates the use of real time testing in altitude and underground environments. Experiments are performed on Xilinx field-programmable gate arrays (FPGAs). Goals, experiment design, statistical confidence, initial results are analyzed and discussed.

Keywords

field programmable gate arrays; integrated circuit design; integrated circuit packaging; integrated circuit testing; FPGAs; Low Noise Underground Laboratory; Rustrel; Xilinx field-programmable gate arrays; qualification methodology; real time testing; submicron ICs; Aerospace industry; Aerospace testing; Contamination; Defense industry; Field programmable gate arrays; Integrated circuit noise; Integrated circuit packaging; Laboratories; Qualifications; Working environment noise; Alpha contamination; SER; field-programmable gate array (FPGA); low noise; real time testing; underground test;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/TNS.2008.2000863

Filename

4636932