DocumentCode
879134
Title
Low-complexity systolic V-BLAST architecture
Author
Koike-Akino, Toshiaki
Author_Institution
Sch. of Eng. & Appl. Sci., Harvard Univ., Cambridge, MA
Volume
8
Issue
5
fYear
2009
fDate
5/1/2009 12:00:00 AM
Firstpage
2172
Lastpage
2176
Abstract
In multiple-input multiple-output systems, an ordered successive interference canceller, termed the vertical Bell laboratories layered space-time (V-BLAST) algorithm, offers good performance. This letter presents a low-complexity V-BLAST scheme suited for parallel implementation. The proposed scheme, using a greedy ordering, can achieve a performance comparable to that of V-BLAST with optimum ordering, while its computational complexity is lower than a linear detector.
Keywords
MIMO communication; interference suppression; space-time codes; computational complexity; greedy ordering scheme; multiple-input multiple-output system; successive interference canceller; systolic V-BLAST architecture; vertical Bell laboratories layered space-time algorithm; Bit error rate; Computational complexity; Detectors; Diversity methods; Interference cancellation; MIMO; Receiving antennas; Resonance light scattering; Transmitters; Transmitting antennas; MIMO; V-BLAST; greedy ordering;
fLanguage
English
Journal_Title
Wireless Communications, IEEE Transactions on
Publisher
ieee
ISSN
1536-1276
Type
jour
DOI
10.1109/TWC.2009.070498
Filename
4927422
Link To Document