Title :
Design and implementation of IP data reassembly processor for multimedia STB
Author :
Kim, Won-Ho ; Kim, Ho-Kyom
Author_Institution :
Div. of Electr. & Electron. Eng., Kongju Nat. Univ., Kongju
fDate :
8/1/2008 12:00:00 AM
Abstract :
This paper describes hardware-based IP data reassembly processor for multimedia STB (set-top-box) compatible with DVB-RCS. The conventional IP reassembly scheme is based on software processing of multimedia STB. As the transmission rate increases in order to support the broadband multimedia data services, the CPU load of multimedia STB is increased and reassembly performance is degraded. To provide smooth and flexible broadband multimedia data services, we proposed hardware based high speed reassembly processor. It has been tested and confirmed to meet required functions and performances.
Keywords :
IP networks; broadband networks; digital video broadcasting; multimedia communication; multimedia computing; satellite communication; telecommunication computing; CPU load; DVB-RCS; IP data reassembly processor; broadband multimedia data services; hardware based high speed; multimedia STB; set-top-box; software processing; transmission rate; Artificial satellites; Digital multimedia broadcasting; Digital video broadcasting; Ethernet networks; Hardware; Multimedia communication; Multimedia systems; Satellite broadcasting; Streaming media; US Department of Transportation; Multimedia STB, IP data reassembly, Satellite multimedia communication system, DVB-RCS;
Journal_Title :
Consumer Electronics, IEEE Transactions on
DOI :
10.1109/TCE.2008.4637630
