DocumentCode
879437
Title
VMOS: high speed TTL compatible MOS logic
Author
Rodgers, T.J. ; Meindl, James D.
Volume
9
Issue
5
fYear
1974
fDate
10/1/1974 12:00:00 AM
Firstpage
239
Lastpage
250
Abstract
VMOS is a new v-groove n-channel MOS logic structure well suited for 5-V high-speed random logic. Compared to a typical gold-doped TTL medium-scale integrated (MSI) circuit, an experimental pin for pin equivalent VMOS circuit is 20 percent faster, four times smaller in area, and six times lower in power dissipation. On-chip VMOS delays are in the 2-3 ns range; off-chip drive capability exceeds 50 MHz with 6 TTL unit loads.
Keywords
Digital integrated circuits; Logic circuits; Metal-insulator-semiconductor devices; digital integrated circuits; logic circuits; metal-insulator-semiconductor devices; Circuits; Epitaxial layers; Etching; Lithography; Logic; MOS devices; MOSFETs; Substrates; Threshold voltage; Voltage control;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1974.1050509
Filename
1050509
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