DocumentCode
879488
Title
Femtojoule Josephson tunneling logic gates
Author
Herrell, Dennis J.
Volume
9
Issue
5
fYear
1974
fDate
10/1/1974 12:00:00 AM
Firstpage
277
Lastpage
282
Abstract
The design of Josephson tunneling logic (JTL) gates capable of performing the logic functions of AND, OR, INVERT and CARRY is considered. The design equations were solved for a rectangular Josephson junction in which the geometry was adjusted to ensure that all logical inputs were equivalent. Experimental JTL gates were found to operate with a logic delay of less than 200 ps, and with a power-delay product of the order of five femtojoules.
Keywords
Josephson junctions; Logic gates; logic gates; Josephson junctions; Logic design; Logic devices; Logic functions; Logic gates; Resistors; Stripline; Switches; Tunneling; Voltage control;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1974.1050513
Filename
1050513
Link To Document