Title :
Single-event upset in evolving commercial silicon-on-insulator microprocessor technologies
Author :
Irom, F. ; Farmanesh, F.H. ; Swift, G.M. ; Johnston, A.H. ; Yoder, G.L.
Author_Institution :
Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA, USA
Abstract :
Single-event upset effects from heavy ions are measured for Motorola and IBM silicon-on-insulator (SOI) microprocessors with different feature sizes and core voltages. Multiple-bit upsets in registers and D-cache were measured and compared with single-bit upsets. Also, the scaling of the cross section with reduction of feature size for SOI microprocessors is discussed.
Keywords :
cache storage; ion beam effects; radiation hardening (electronics); silicon-on-insulator; D-cache; SOI; commercial silicon-on-insulator microprocessor technologies; core voltages; feature sizes; heavy ions; multiple-bit upsets; registers; single-event upset; Microprocessors; NASA; Neutrons; Radiation effects; Registers; Silicon on insulator technology; Single event upset; Space technology; Substrates; Voltage;
Journal_Title :
Nuclear Science, IEEE Transactions on
DOI :
10.1109/TNS.2003.821820
