Title :
Single event upset and hardening in 0.15 μm antifuse-based field programmable gate array
Author :
Wang, J.J. ; Wong, W. ; Wolday, S. ; Cronquist, B. ; McCollum, J. ; Katz, R. ; Kleyner, I.
Author_Institution :
Actel Corp., Mountain View, CA, USA
Abstract :
The single event effects and hardening of a 0.15 μm antifuse FPGA, the AX device, were investigated by beam test and computer simulation. The beam test showed no permanent damage mode. Functional failures were observed and attributed to the upsets in a control logic circuit, the startup sequencer. Clock upsets were observed and attributed to the single event transients in the clock network. Upsets were also measured in the user flip-flop and embedded SRAM. The hardening technique dealing with each upset mode is discussed in detail. SPICE and three-dimensional mixed-mode simulations were used to determine the design rules for mitigating the multiple upsets due to glancing angle and charge sharing. The hardening techniques have been implemented in the newly fabricated RTAXS device. Preliminary heavy-ion-beam test data show that all the hard-wired hardening solutions are working successfully.
Keywords :
SPICE; SRAM chips; field programmable gate arrays; flip-flops; ion beam effects; radiation hardening (electronics); 0.15 μm antifuse-based field programmable gate array; 0.15 micron; AX device; SPICE; antifuse FPGA; beam test; charge sharing; clock upsets; computer simulation; control logic circuit; design rules; embedded SRAM; functional failures; glancing angle; hardening; hardening technique; multiple upsets; permanent damage mode; single event transients; single event upset; startup sequencer; three-dimensional mixed-mode simulations; user flip-flop; Circuit testing; Clocks; Computer simulation; Field programmable gate arrays; Flip-flops; Logic circuits; Programmable logic arrays; Random access memory; SPICE; Single event upset;
Journal_Title :
Nuclear Science, IEEE Transactions on
DOI :
10.1109/TNS.2003.822090
