A high-speed P-channel random access 1024-bit memory made with electron lithography

A switched capacitor, p-channel, 1024 bit random access memory has been made with electron lithography. The basic circuit was the same as that described by Boll and Lynch (see abstr. B35355 or C22818 fo 1973) but with halved lateral dimensions. The gate length of the switching transistor was 4 /spl mu/m, and the chip size was 1.2/spl times/1.8 mm. In order to fabricate the device, a 1 /spl mu/m alignment accuracy was required. Even with this modest shrinking of feature size, the minimum access time of the memory was reduced from 100 ns to less than 50 ns.