Title :
Feedthrough in TTL circuits under marginal triggering conditions
fDate :
6/1/1975 12:00:00 AM
Abstract :
The feedthrough and regeneration action of a TTL circuit under marginal transient conditions such as low input logic levels and slow input signals are studied. The effect of regeneration during rise time and a study of storage delay are presented. An optimized design procedure is described to reduce feedthrough during rise time without endangering the totem-pole inherent reduction of storage time.
Keywords :
Transistor-transistor logic; Trigger circuits; transistor-transistor logic; trigger circuits; Circuit simulation; Delay effects; Electrons; Flip-flops; Laboratories; Manufacturing; Nuclear physics; Parasitic capacitance; Solid state circuits; Voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1975.1050577
